The Opus Challenger "3-in-1" is a disc drive with integrated drive interface and RAM disk that connects to the Beeb (unusually) via the 1MHz bus. It comes in two varieties: one with a 256K RAM disk, and one with a 512K RAM disk. It's pretty neat, even if it has troubles with the later Superior Software disc protection.
I've not seen a single page with low-level programming information for it before. So, to fill a hole in the internet, I made this one.
This information came from various places: Wouter Scholten's Challenger page (paging registers), 8bs disk bbc109 (the Challenger utils gave me the location of the disk registers), ROM disassembly, my own experimentation on a Beeb and seeing what the ROM does when running on my emulator.
The Challenger has a 1770 FDC. Registers are:
Location |
Read |
Write |
&FCF8 |
1770 Status register |
1770 command register |
&FCF9 |
1770 track register |
|
&FCFA |
1770 sector register |
|
&FCFB |
1770 data register |
|
&FCFC |
1770 drive control |
|
This 1770 does not send an NMI to the BBC after running a Restore command. According to the 1770 datasheets, it should. The Challenger ROM simply won't work under emulation if this happens, though, and I have confirmed the lack of NMI on a real Beeb with a Challenger.
The drive control register appears to be laid out as follows:
Bit |
Purpose |
7 |
? Unused? |
6 |
? Unused? |
5 |
Density select: 0=double, 1=single |
4 |
? Always set |
3 |
? Unused? |
2 |
Select drive 1 |
1 |
Select drive 0 |
0 |
Select side: 0=side 0, 1=side 1 |
Density select I determined by watching the drive control during *FORMAT.
The purpose of bit 4 is unclear. I'm not making any guesses about what it might do until I've done more experiments; I don't consider it particularly important. However, the ROM always seems to set this bit -- so you should too!
Bits 7, 6 and 3 are always clear.
The RAM is accessible through JIM (page &FD). One page is visible in JIM at a time. The selected page is controlled by the two paging registers:
Location |
Register |
&FCFE |
Paging register MSB |
&FCFF |
Paging register LSB |
With the 256k model, 1024 pages numbered &000 to &3FF (inclusive) are available. I assume the 512K model (which I don't have) has twice as many available. Pages outside the valid range contain patterns of alternating FF and 00, and are read-only.
It appears that pages 10 and up are used for the RAM disk. The first 10 pages are used by DDOS.
If you want to format a 40 track disk, you must use *OPT8,1 before doing the format. Otherwise you end up with an 80 track disk of which only 40 tracks have been formatted, which isn't the same thing.
I was expecting there to be a 40-track-switch bit in the drive control, to force the drive to double step like the switches on some drives. Instead, it looks like the ROM does this by hand. It seems to step to track 2, then do a read address to see which track it's _really_ on, then adjust things accordingly. I'm guessing this is why *OPT8,0 fixed protection on some Acorn and Superior Software titles.
Text of 1772 data sheet (text, 23K)
Challenger ROM, 1.01 (binary, 16K)
Wouter Scholten's Opus Challenger page
Wouter Scholten's BBC software page; has Opus Challenger ROMs 1.00 and 1.03
WD1770 disk controller (Acorn-oriented summary)
bbcdocs.com (177x datasheets, Challenger manual)